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PCIPlugin.h
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1996-05-01
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/*
File: PCIPlugin.h
Contains: This file contains all interface related structures and prototypes for pci expert to plugin
Version: Technology: Copland
Release: Universal Interfaces 3.0d3 on Copland DR1
Copyright: © 1984-1996 by Apple Computer, Inc. All rights reserved.
Bugs?: If you find a problem with this file, send the file and version
information (from above) and the problem description to:
Internet: apple.bugs@applelink.apple.com
AppleLink: APPLE.BUGS
*/
#ifndef __PCIPLUGIN__
#define __PCIPLUGIN__
#ifndef __PCICOMMONPLUGIN__
#include <PCICommonPlugin.h>
#endif
#ifdef __cplusplus
extern "C" {
#endif
#if PRAGMA_IMPORT_SUPPORTED
#pragma import on
#endif
#if PRAGMA_ALIGN_SUPPORTED
#pragma options align=mac68k
#endif
#if FOR_SYSTEM8_PREEMPTIVE
/* subordinate pci device tree 'reg' property structure definition*/
struct PCIRegProperty {
UInt32 physicalHigh;
UInt32 physicalMiddle;
UInt32 physicalLow;
UInt32 propAddress;
UInt32 propLength;
};
typedef struct PCIRegProperty PCIRegProperty;
typedef PCIRegProperty *PCIRegPropertyPtr;
/* pci device tree 'bus-range' property structure definition*/
struct PCIBusRangeProperty {
UInt32 lowBus;
UInt32 highBus;
};
typedef struct PCIBusRangeProperty PCIBusRangeProperty;
typedef PCIBusRangeProperty *PCIBusRangePropertyPtr;
/* subordinate pci device description table entry header structure definition*/
typedef LogicalAddress ConfigAddress;
typedef LogicalAddress IOAddress;
struct PCIDeviceTableEntryHeader {
RegEntryRef entry;
char name[32];
UInt32 pciDomain;
UInt32 pciBusNumber;
UInt32 pciSecondBusNumber;
UInt32 accessType;
PCIRegPropertyPtr regProperty;
ByteCount regPropertyCount;
IOAddress ioBase;
LogicalAddress rangeBase;
};
typedef struct PCIDeviceTableEntryHeader PCIDeviceTableEntryHeader;
typedef PCIDeviceTableEntryHeader *PCIDeviceTableEntryHeaderPtr;
/* subordinate pci device description table entry structure definition*/
struct PCIDeviceTableEntry {
struct PCIDeviceTableEntry * nextDeviceEntry;
PCIDeviceTableEntryHeader header;
PCIBridgeDescriptorPtr BridgePlugin;
UInt32 pluginSpecificStuff[16];
};
typedef struct PCIDeviceTableEntry PCIDeviceTableEntry;
typedef PCIDeviceTableEntry *PCIDeviceTableEntryPtr;
/* type defs for plugin interfaces*/
typedef OSStatus (*ConfigReadByteFuncPtr)(ConfigAddress configAddr, UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*ConfigReadWordFuncPtr)(ConfigAddress configAddr, UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*ConfigReadLongFuncPtr)(ConfigAddress configAddr, UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*ConfigWriteByteFuncPtr)(ConfigAddress configAddr, UInt8 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*ConfigWriteWordFuncPtr)(ConfigAddress configAddr, UInt16 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*ConfigWriteLongFuncPtr)(ConfigAddress configAddr, UInt32 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*IOReadByteFuncPtr)(IOAddress ioAddr, UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*IOReadWordFuncPtr)(IOAddress ioAddr, UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*IOReadLongFuncPtr)(IOAddress ioAddr, UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*IOWriteByteFuncPtr)(IOAddress ioAddr, UInt8 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*IOWriteWordFuncPtr)(IOAddress ioAddr, UInt16 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*IOWriteLongFuncPtr)(IOAddress ioAddr, UInt32 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*IntAckReadByteFuncPtr)(UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*IntAckReadWordFuncPtr)(UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*IntAckReadLongFuncPtr)(UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*SpecialCycleWriteLongFuncPtr)(UInt32 valuePtr, PCIDeviceTableEntryPtr pciDeviceHead);
typedef OSStatus (*InitDeviceEntryFuncPtr)(PCIDeviceTableEntryPtr deviceDescriptor);
typedef OSStatus (*GetIOBaseFuncPtr)(PCIDeviceTableEntryPtr deviceDescriptor, IOAddress *ioBase);
/* pci domain descriptor definition*/
struct PCIControlDescriptor {
PCIPluginHeader InterfaceHeader;
PCIDeviceTableEntry PCIDeviceDescriptor;
DriverDescription * TheDomainDriverDescription;
InitializeFuncPtr InitializeFunc;
ConfigReadByteFuncPtr ConfigReadByteFunc;
ConfigReadWordFuncPtr ConfigReadWordFunc;
ConfigReadLongFuncPtr ConfigReadLongFunc;
ConfigWriteByteFuncPtr ConfigWriteByteFunc;
ConfigWriteWordFuncPtr ConfigWriteWordFunc;
ConfigWriteLongFuncPtr ConfigWriteLongFunc;
IOReadByteFuncPtr IOReadByteFunc;
IOReadWordFuncPtr IOReadWordFunc;
IOReadLongFuncPtr IOReadLongFunc;
IOWriteByteFuncPtr IOWriteByteFunc;
IOWriteWordFuncPtr IOWriteWordFunc;
IOWriteLongFuncPtr IOWriteLongFunc;
IntAckReadByteFuncPtr IntAckReadByteFunc;
IntAckReadWordFuncPtr IntAckReadWordFunc;
IntAckReadLongFuncPtr IntAckReadLongFunc;
SpecialCycleWriteLongFuncPtr SpecialCycleWriteLongFunc;
InitDeviceEntryFuncPtr InitDeviceEntryFunc;
GetIOBaseFuncPtr GetIOBaseFunc;
FinalizeFuncPtr FinalizeFunc;
};
typedef struct PCIControlDescriptor PCIControlDescriptor;
typedef PCIControlDescriptor *PCIControlDescriptorPtr;
/* Prototypes for the PIM*/
extern OSStatus PCIPluginInitialize(void);
extern OSStatus PCIPluginConfigReadByte(ConfigAddress configAddr, UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginConfigReadWord(ConfigAddress configAddr, UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginConfigReadLong(ConfigAddress configAddr, UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginConfigWriteByte(ConfigAddress configAddr, UInt8 value, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginConfigWriteWord(ConfigAddress configAddr, UInt16 value, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginConfigWriteLong(ConfigAddress configAddr, UInt32 value, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginIOReadByte(IOAddress ioAddr, UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginIOReadWord(IOAddress ioAddr, UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginIOReadLong(IOAddress ioAddr, UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginIOWriteByte(IOAddress ioAddr, UInt8 value, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginIOWriteWord(IOAddress ioAddr, UInt16 value, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginIOWriteLong(IOAddress ioAddr, UInt32 value, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginIntAckReadByte(UInt8 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginIntAckReadWord(UInt16 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginIntAckReadLong(UInt32 *valuePtr, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginSpecialCycleWriteLong(UInt32 value, PCIDeviceTableEntryPtr pciDeviceEntry);
extern OSStatus PCIPluginInitDeviceEntry(PCIDeviceTableEntryPtr deviceDescriptor);
extern OSStatus PCIPluginGetIOBase(PCIDeviceTableEntryPtr deviceDescriptor, IOAddress *ioBase);
extern OSStatus PCIPluginFinalize(void);
/* general purpose pci masks*/
enum {
kPCIconfigAddrReservedValue = 0x00000000,
kPCIconfigAddrReservedMask = 0xFF000000,
kPCIconfigAddrBusNumberMask = 0x00FF0000,
kPCIconfigAddrDeviceNumberMask = 0x0000F800,
kPCIconfigAddrFunctionNumberMask = 0x00000700,
kPCIconfigAddrRegisterNumberMask = 0x000000FC,
kPCIconfigAddrAccessTypeMask = 0x00000001,
kPCIregisterByteMask = 0x00000003,
kPCIregisterNotByteMask = 0xFFFFFFFC,
kPCIregisterWordMask = 0x00000002
};
/* pci encoded-int structure constants definition*/
enum {
kPCIPhysicalHighRelocatableMask = 0x80000000,
kPCIPhysicalHighRelocatable = 0x80000000,
kPCIPhysicalHighPrefetchableMask = 0x40000000,
kPCIPhysicalHighPrefetchable = 0x40000000,
kPCIPhysicalHighAliasedMask = 0x20000000,
kPCIPhysicalHighAliased = 0x20000000,
kPCIPhysicalHighSpaceCodeMask = 0x03000000,
kPCIPhysicalHighSpaceCodeConfig = 0x00000000,
kPCIPhysicalHighSpaceCodeIO = 0x01000000,
kPCIPhysicalHighSpaceCodeMemory = 0x02000000,
kPCIPhysicalHighSpaceCode64Bit = 0x03000000,
kPCIPhysicalHighBusMask = 0x00FF0000,
kPCIPhysicalHighDeviceMask = 0x0000F800,
kPCIPhysicalHighDevice0 = 0x00000000,
kPCIPhysicalHighDevice1 = 0x00000800,
kPCIPhysicalHighDevice2 = 0x00001000,
kPCIPhysicalHighDevice3 = 0x00001800,
kPCIPhysicalHighDevice4 = 0x00002000,
kPCIPhysicalHighDevice5 = 0x00002800,
kPCIPhysicalHighDevice6 = 0x00003000,
kPCIPhysicalHighDevice7 = 0x00003800,
kPCIPhysicalHighDevice8 = 0x00004000,
kPCIPhysicalHighDevice9 = 0x00004800,
kPCIPhysicalHighDevice10 = 0x00005000,
kPCIPhysicalHighDevice11 = 0x00005800,
kPCIPhysicalHighDevice12 = 0x00006000,
kPCIPhysicalHighDevice13 = 0x00006800,
kPCIPhysicalHighDevice14 = 0x00007000,
kPCIPhysicalHighDevice15 = 0x00007800,
kPCIPhysicalHighDevice16 = 0x00008000,
kPCIPhysicalHighDevice17 = 0x00008800,
kPCIPhysicalHighDevice18 = 0x00009000,
kPCIPhysicalHighDevice19 = 0x00009800,
kPCIPhysicalHighDevice20 = 0x0000A000,
kPCIPhysicalHighDevice21 = 0x0000A800,
kPCIPhysicalHighDevice22 = 0x0000B000,
kPCIPhysicalHighDevice23 = 0x0000B800,
kPCIPhysicalHighDevice24 = 0x0000C000,
kPCIPhysicalHighDevice25 = 0x0000C800,
kPCIPhysicalHighDevice26 = 0x0000D000,
kPCIPhysicalHighDevice27 = 0x0000D800,
kPCIPhysicalHighDevice28 = 0x0000E000,
kPCIPhysicalHighDevice29 = 0x0000E800,
kPCIPhysicalHighDevice30 = 0x0000F000,
kPCIPhysicalHighDevice31 = 0x0000F800,
kPCIPhysicalHighFunctionMask = 0x00000700,
kPCIPhysicalHighFunction0 = 0x00000000,
kPCIPhysicalHighFunction1 = 0x00000100,
kPCIPhysicalHighFunction2 = 0x00000200,
kPCIPhysicalHighFunction3 = 0x00000300,
kPCIPhysicalHighFunction4 = 0x00000400,
kPCIPhysicalHighFunction5 = 0x00000500,
kPCIPhysicalHighFunction6 = 0x00000600,
kPCIPhysicalHighFunction7 = 0x00000700,
kPCIPhysicalHighRegisterMask = 0x000000FF,
kPCIPhysicalHighRegisterVendorID = 0x00000000,
kPCIPhysicalHighRegisterDeviceID = 0x00000002,
kPCIPhysicalHighRegisterCommand = 0x00000004,
kPCIPhysicalHighRegisterRevisionID = 0x00000008,
kPCIPhysicalHighRegisterCacheLineSIze = 0x0000000C,
kPCIPhysicalHighRegisterHeaderType = 0x0000000E,
kPCIPhysicalHighRegisterBaseAddress = 0x00000010,
kPCIPhysicalHighRegisterBridgeBusInfo = 0x00000018,
kPCIPhysicalHighRegisterCardbusCIS = 0x00000028,
kPCIPhysicalHighRegisterSubsystemVendorID = 0x0000002C,
kPCIPhysicalHighRegisterExpansionROMBase = 0x00000030,
kPCIPhysicalHighRegisterInterruptLine = 0x0000003C
};
/* pci cycle access type for forwarding*/
enum {
kPCIaccessType0 = 0,
kPCIaccessType1 = 1
};
#endif
#if PRAGMA_ALIGN_SUPPORTED
#pragma options align=reset
#endif
#if PRAGMA_IMPORT_SUPPORTED
#pragma import off
#endif
#ifdef __cplusplus
}
#endif
#endif /* __PCIPLUGIN__ */